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using dialog semiconductor* da903x advanced power management controllers with the intel? pxa27x processor family application note ? revision 1.0 may 2004 reference number: 280091-001
ii application note information in this document is provided in connection with intel? products. no license, express or implied, by estoppel or otherwise, to any intellectual property righ ts is granted by this document. except as provided in intel's terms and conditions of sale for such products, intel assu mes no liability whatsoever, and intel disclaims any express or implied warranty, relating to sale and/or use of intel product s including liability or warranties relating to fitness for a particular purpose, merchantability, or infringeme nt of any patent, copyright or other intellectual property right. intel products are not intended for use in medical, life saving, or life sustaining applications. intel may make changes to specifications and product descriptions at any time, without notice. designers must not rely on the absence or characteristics of any features or instructions marked reserved? or undefined.? int el reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. this application note may contain design defects or errors known as errata which may cause the product to deviate from publishe d specifications. current characterized errata are available on request. this document and the software described in it are furnished under license and may only be used or copied in accordance with th e terms of the license. the information in this document is furnished for informational use only, is subject to change without notice, and sho uld not be construed as a commitment by intel corporation. intel corporation assumes no responsibility or liability for any errors or inaccuracies that m ay appear in this document or any software that may be provided in association with this document. except as permitted by such license, no part o f this document may be reproduced, stored in a retrieval system, or transmitted in any form or by any means without the express written consent of intel corporation. contact your local intel sales office or your distributor to obtain the latest specifications and before placing your product o rder. copies of documents which have an ordering number and are referenced in this document, or other intel literature may be obtaine d by calling 1-800- 548-4725 or by visiting intel's website at http://www.intel.com. copyright ? intel corporation, 2003 intel, the intel logo, intel strataflash, intel xscale, intel pxa250, and intel pxa255 are trademarks or registered trademarks of intel corporation or its subsidiaries in the united states and other countries. *other names and brands may be claimed as the property of others.
application note iii revision history date revision reason for changes may 2004 1.0 initial release of this document
iv application note
using dialog semiconductor* da903x advanced power management controllers with the intel? pxa27x processor family application note 1 1.0 introduction this document explains how to use the dialog semiconductor* da903x advanced power management controllers (da903x pmic) with the intel? pxa27x processor family (pxa27x processor)-based platform to design power supply, battery management, and sleep-mode functions. the dialog semiconductor* da903x advanced power management controllers consists of two devices: ? DA9030 power management integrated circuit (pmic) ? da9031 power management integrated circuit the new da903x pmic is a highly integrated chip that supports the wireless intel speedstep? technology, enabling significant power savings by intelligently managing voltage and frequency changes similar to the technology used in intel notebook processors. as a result of its highly integrated features, the da903x pmic reduces overall system cost and size significantly when compared to an equivalent discrete solution. this document addresses only the power-supply related features; addressing all of the features and functions of the optimized pmic is beyond the scope of this document. the DA9030 pmic and da9031 pmic datasheets describe all the features of the devices in detail. 1.1 purpose of this document this document: ? briefly introduces the DA9030 pmic and its variants. ? contains information about power domains, component selection, schematics of the pxa27x processor and da903x pmic interconnection, and on the other hardware related issues. ? concentrates on the different power modes of the pxa27x processor and the DA9030 pmic power-supply features. ? briefly describes the charger concept and modes of operation. ? contains concluding remarks. 1.2 DA9030 pmic variants the dialog semiconductor DA9030 pmic was developed in close cooperation with intel to achieve the most optimized pmic for mobile handsets using an intel communication processor together with the pxa27x processor. all functions can be evaluated by using the dialog semiconductor evaluation board together with the control software. the da9031 is the first variant to address pxa27x processor stand-alone applications. for systems using stacked memory or larger amounts of external memory (greater than 256 mb), the second buck converter can be programmed to provide a 1.8v supply with currents up to 600ma. customized versions of the existing pmic to adapt it to specific customer requirements are also available through dialog semiconductor. 1.2.1 main features of DA9030 pmic the DA9030 pmic is an highly integrated power management controller and includes the following main features:
using dialog semiconductor* da903x advanced power management controllers with the intel? pxa27x processor family 2 application note ? integrated, single-chip solution for battery charge control and power supply management ? programmable low-dropout linear voltage regulators with over 65-db power-supply rejection ratio (psrr) from 10 hz to 10 khz ? high efficiency dc-to-dc converter (buck) with programmable output voltage ? high efficiency dc-to-dc converter (buck) with programmable output voltage and dynamic voltage control (dvc) ? one step-up low-current charge pump dc-to-dc converter with external capacitors ? system over-voltage and under-voltage shutdown ? power on/off and reset control logic ? five individually selectable led drivers with pwm control ? boost converter for two parallel strings of up to four white leds each ? vibrator driver with pwm control ? internal 8-bit analog-to-digital converter with auxiliary inputs; an automatic mode of operation allows monitoring of charger operation ? 8-ohm 500mw speaker driver with volume control ? linear or pulse-mode charger for single-cell li-ion or li-polymer packs ? integrated control over pre-charge, constant-current, and constant-voltage charging phases; pulse-mode charging with programmable on/off time ? programmable charging current and voltage ? programmable charge termination by time ? battery temperature sensing ? battery pack wake up ? serial 400 khz i 2 c-compatible interface to transfer the control data between the pmic and the host controller (with two i 2 c addresses) ? internal current controlled oscillator (cco) generates the internal high clock frequency ? interrupt signal (irq) that generates the interrupt request for the host controller ? super capacitor back-up charger ? enhanced esd protection on all pins that connect to the main battery pack ? usb otg charge pump with session detection ? usb detection via exton pin enables automatic start-up including linear charging at 100ma. 2.0 system application block diagram figure 1 depicts a system application block diagram.
using dialog semiconductor* da903x advanced power management controllers with the intel? pxa27x processor family application note 3 the system-application block diagram outlines a mobile handset using the pxa27x processor. the dialog semiconductor DA9030 pmic handles all required power supplies for the pxa27x processor within such a system and also controls an (optional) communications processor (referred to in the remainder of this document as cproc) as well as the application processor, independently. figure 1. block diagram pxa27x application processor (w/flash & sdram) communication processor w/flash & sram) optional 802.11b bluetooth sdio camera camera strobe lcd keypad irda usb otg/ power coms radio (gsm/gprs/ wcdma?) sim pmic DA9030 (incl cp) da9031 (excl cp) led lcd & touchscreen dual hifi voice codec battery msl
using dialog semiconductor* da903x advanced power management controllers with the intel? pxa27x processor family 4 application note the applications processor controls all system-related peripheral functions whereas the communication controller predominantly focuses on the radio-communication part. the inter- processor communication occurs through the high-speed mobile serial-link interface (msl). the communication processor and its associated parts are optional. in this case, when only using the application processor pxa27x, the dialog semiconductor pmic derivate da9031 may be selected to reduce overall system cost. 2.1 system power connection diagram connecting the intel? pxa27x processor family and da903x pmic is shown in figure 2 . the schematic diagram in figure 1 shows how the pxa27x processor and the da903x can be interconnected to build an efficient power-supply system with few additional components. this configuration is set up for dynamic-voltage management as well as for supporting sleep mode. the white led backlight circuit is optional. not all the pins of the da903x pmic and the pxa27x processor are shown. the diagram is described in more detail throughout the remainder of this section and is also referred to in other sections. refer to the device data sheets for the use and description of the other pins. figure 2. intel? pxa27x processor family and da903x pmic interconnection da903x i2c_clock i2c_data batt_fault vcc_fault sys_en pwr_en resout1_n irq ldo16 ldo19/buck 1 ldo18 ldo15 ldo17 vdvcbuck swdvcbuck vrtc onkey exton vchg ch_source ch_gate chsensep chsensn ch_vbat tbatref tbat wledsw wledipos wledineg vddref vref rref vrefex_m vldo_int vdd_mono pxa27x pwr_scl_gpio3 pwr_sda_gpio4 nbatt_fault nvdd_fault sys_en pwr_en nreset irq_gpio0 vcc_sram vcc_mem vcc_lcd vcc_bb vcc_pll vcc_usim vcc_usb vcc_core vcc_io vcc_batt fvpp fwp 0.47f 1.0f 0.1f 0.1f 1.0f 2.2f 2.2f 2.2f 1.0f 33f super - cap d1 10h dc_batt power-on-switch vcc_io battery& charger if block battery pack v_charger usb_charger sense white led-if block white-leds dc_batt 1.0f 10k 10k 10k 100k 2.2k
using dialog semiconductor* da903x advanced power management controllers with the intel? pxa27x processor family application note 5 2.2 pxa27x processor family power domain table 1 describes the pxa27x processor power domain and the related pmic power sources. two options are shown for driving internal or external memory. 2.3 digital signals table 2 describes the digital signals. table 1. pxa27x processor power domains, connections and descriptions pxa27x processor da903x pmic description vcc_batt vrtc the rtc ldo features a very low quiescent current (<10ua) since this ldo is running all the time, even when the handset is switched off. the typical output voltage is 2.65v. vcc_core dvcbuck a dc to dc buck converter that supplies 0.85v - 1.625v at 600ma with a +/- 3% accuracy. the converter operates at a high frequency (1mhz) to allow the use of a small external inductor. vcc_pll ldo15 a 25ma low-noise ldo with programmable output voltage (1.1v to 2.65v in steps of 50mv) from the i 2 c bus. the default value at power up for this ldo is 1.3v. vcc_mem ldo19 a 110ma ?digital? ldo with programmable output voltage (1.8v to 3.2v in steps of 100mv) from the i 2 c bus. this ldo can be used to supply other external peripheral dev ices connected to the bb. the default value at power up for this ldo is 1.8v. vcc_bb fvpp fwp vcc_mem buck 1 a 600ma dc-to-dc converter suitable for large memory configurations and mcp options. the voltage can be set to 1.8v. (can be used instead of ldo19) vcc_io ldo 18 a 100ma low dropout digital ldo with programmable output voltage (1.8v to 3.2v in steps of 100mv) from the i 2 c bus. the default value at power up for this ldo is 2.8v. vcc_usb vcc_lcd vcc_usim ldo 17 a 30ma low noise ldo with programmable output voltage (1.8v to 3.2v in steps of 100mv) from the i 2 c bus. the default value at power up for this ldo is 1.8v. vcc_sram ldo 16 a 40ma low noise ldo with programmable output voltage (1.1v to 2.65v in steps of 50mv) from the i 2 c bus. the default value at power up for this ldo is 1.1v. table 2. digital signal descriptions (sheet 1 of 2) pxa27x processor da903x pmic description pwr_scl_gpio3 i2c_clock i 2 c clock connection pwr_sda_gpio4 i2c_data i 2 c bi-directional serial data nbatt_fault batt_fault battery fa ult signal to pxa27x processor nvdd_fault vcc_fault indicates a fault condition on the pxa27x processor ldos
using dialog semiconductor* da903x advanced power management controllers with the intel? pxa27x processor family 6 application note 2.4 component selection 2.4.1 components the components shown in table 3 are used in the reference design (other equivalent parts can be used as well). refer to the datasheets for more details. 2.4.2 decoupling capacitors use additional decoupling capacitors, depending on layout as common practice in electronic engineering (that is, close to power-supply input pins; in particular, near vin pins of the dc-to-dc converters; not shown in the previous diagram). 3.0 system startup and operating modes most handheld systems need to operate with the lowest possible power consumption to keep the operating time high. the pxa27x processor as well as the da903x offer several operating and power-save modes to accommodate these requirements. sys_en sys_en enable signal from pxa27x processor pwr_en pwr_en enable signal from pxa27x processor nreset resout1 reset output to pxa27x processor irq_gpio0 irq interrupt request from pmic ? n-c hannel open drain output, active low note: refer to the intel? pxa27x processor fa mily electrical, mechanical and thermal specifications (emts) for detailed information about each signal. table 2. digital signal descriptions (sheet 2 of 2) pxa27x processor da903x pmic description table 3. components reference description value type manufacturer d1 schottky ? cus02 panasonic l inductor 10h c4-y1.2r 4.7uh mitsumi 1f capacitor x5r 1f ecj1vb1c105k panasonic 2.2f capacitor x5r 2.2f ecj1vb1c225k panasonic 0.22uf capacitor x7r 220nf c1608x7r1c224k tdk 0.3f supercap 414r-s-va5r kanebo rref resistor 1% 100k any rvrtc resistor 1% 2.2k any
using dialog semiconductor* da903x advanced power management controllers with the intel? pxa27x processor family application note 7 3.1 pxa27x processor power modes the pxa27x processor provides the following power modes: run, turbo, idle, standby, sleep, and deep sleep. ? run mode is the normal execution mode. the other power modes must be entered from run mode. the other power modes return to run mode when being exited. ? turbo mode is for use in peak processing and is a multiple of run-mode frequency. the core voltage must allow for the turbo frequency, so a dynamic voltage change can be considered. ? idle mode is the first level of reduced power consumption defined by the pxa27x processor. the cpu clock is stopped in idle mode only. there are no consequences for the da903x. ? sleep mode significantly reduces the power consumption of the pxa27x processor since most of the internal processor state is not clocked and, therefore, not preserved. only the real-time clock (rtc) and the power manager are clocked while a pxa27x processor is in sleep mode. the da903x pmic pulls the core voltage down to vss during sleep mode. (see sections 3.2 and 3.3). ? deep sleep mode is where all power domains except the vcc_batt can be powered down. external low-voltage and high voltage power supplies can be disabled. ? standby mode is similar to sleep except cpu state is preserved. all activity inside the processor stops. rtc operational, os timer are optionally operational. the initial core frequency is low after boot up. the frequency-change sequence changes the processor clock frequency for run mode and turbo mode (see the intel? pxa27x processor family developer?s manual for details). 3.2 da903x operating modes overview 3.2.1 power-down mode the power-down mode of the da903x has the minimum current consumption. the only active blocks are the internal power-on-reset block, the rtc ldo and its ultra low-power bandgap reference, and the input-detection circuit for the charger vchg_detect. all other blocks are disabled to avoid draining the external battery when the equipment is switched off. when the battery voltage is below the vporlower (vrtc + 0.075v) threshold voltage, the da903x is held in a reset state. during this time, the current consumption is at an absolute minimum with the only active circuits being the rtcldo bandgap (used by the por generator) and the charger detection comparator. while the internal por is asserted, the da903x is held in the power-down state and cannot be turned on until the por has negated. 3.2.2 power-on-start-up mode the start-up mode is entered from the power-down mode initiated by the onkey_n, pwren1, exton or vchg_detect signals. this mode sequentially starts up the internal references, internal oscillator, voltage supervision, buck converter, followed by the ldo regulators?all under the control of an internal state machine. when a fault is detected (battery under-voltage, battery over-voltage or watchdog time out of the cproc response), the state machine terminates the start-up mode and returns to the power-down mode; otherwise, the state machine completes the start-up sequence, at which point the da903x switches to the active mode.
using dialog semiconductor* da903x advanced power management controllers with the intel? pxa27x processor family 8 application note 3.2.3 active mode the active mode is entered after a successful start-up or pre-charge mode. during this operating mode, the pxa27x processor takes over control of the system power management. status information is passed to the control processor via the i 2 c bus. the da903x can flag interrupt requests to the control processor via a dedicated interrupt pin (irq). additionally, the temperature and voltages inside the da903x are monitored and any fault conditions are flagged to the control processor. 3.2.4 sleep mode certain parts of the da903x can be switched to a power-saving mode under the control of the sleep_n pin (active low), via the i 2 c register bit sleep, or via the pwr_en and sys_en pins. this sleep mode is entered only when the da903x was in active mode. in sleep mode, the charger block for fast charging is powered down, the buck switches to a low- power mode, and the external master clock can be disconnected (the da903x switches to an internal oscillator when the external master is not present). the battery under-voltage detection (via auto-adc), reference generators, and internal oscillator are still enabled in this mode. the ldo for each processor can be programmed to one of the states when sleep mode is active (off, on, or high-z state). 3.3 power on/off and reset control 3.3.1 internal power-on-reset generator (por) to guarantee the correct startup of the da903x, a power-on-reset (por) is generated for the first connection of either the charger supply or the battery supply voltage. an internal shunt regulator supplied from the charger input is implemented that allows the da903x to operate when the primary battery is completely discharged. this regulated supply is switched to the vddref pin of the da903x. the por is asserted while the voltage on vddref is less than the vporupper threshold voltage. the vddref pin is also the supply for the vrtc ldo. the vddref pin is internally switched back to the main battery supply when the charger is not present. the internal por is negated when the vddref voltage rises above the vporupper threshold voltage. the da903x starts the bandgap reference circuit and the internal oscillator reads the contents of the fuse trim block, after which it returns to the power-down mode. the da903x is held in a reset state while the por is asserted, during which the current consumption is at an absolute minimum, with the only active circuits being the rtcldo bandgap (used by the por generator) and the charger detection comparator. the da903x cannot be turned on until the por has negated. resout1_n is held low in this state. 3.3.2 switch on and watchdog there are four different ways to switch on the da903x chip: ? pulling the onkey_n input signal low (falling edge event) ? pulling the pwren1 high from the control processor interrupt alarm signal (rising-edge event) ? pulling the exton input signal high from the external peripheral (rising-edge event)
using dialog semiconductor* da903x advanced power management controllers with the intel? pxa27x processor family application note 9 ? the da903x sensing that the charger external adapter is connected by means of an internal signal vchg_detect being asserted. pulling the onkey_n signal low is the normal way of turning on the device, which (1) turns on most of the ldo regulators and the buck converter inside the da903x, and (2) asserts the resout_n and resout_n_od signal to the (optional) baseband processor and resout1_n for the pxa27x processor. once the resout1_n is released (goes high), the pxa27x processor starts an activation sequence via the i 2 c bus communication with the da903x, at which point the onkey_n can be released. the resout_n_od output is provided for use with external peripheral circuits, and can be or?ed with an external-reset pin to generate a reset toward the (optional) baseband processor on resout_n. pwren1 going high also turns on the device; for example, when the alarm in the rtc module expires and when the alarm signal from the processor is asserted. an external device can also turn on the handset with the auxiliary exton signal, and initiate automatic linear charging at 100ma. with suitable external components, the da903x can detect an external usb power source being connected, from which automatic linear charging at 100ma can be started. 3.3.3 start-up sequence with onkey_n or exton or pwren1 when a start-up condition is detected on one of these pins and the vbat voltage is above the vporupper threshold voltage (that is, the internal por is not asserted), the master band-gap reference and the internal oscillator is enabled. the da903x returns to power-down mode when the signal has been released after a period of tdelay1 (32ms, to allow for debouncing of the input signal and the bandgap reference to settle). if the signal is still asserted, the da903x continues the start-up sequence and proceeds by comparing the vbat with the vbatgood threshold. the pxa27x boot sequence starts performing the following sequence if the battery level is ?good?: ? the da903x de-asserts the resout1_n (high) after a minimum 50 ms from powerup of the rtc ldo after por (this resets the pmu unit in the pxa27x processor). ? once the vbat has risen above the vbatunder threshold, the da903x de-asserts (high) batt_fault signal to the pxa27x processor (indicating that vbat is ok). ? the da903x waits for the pxa27x processor to assert (high) sys_en and powers up the ldos associated with this signal (described in this section). ? the da903x waits for the pxa27x processor to assert pwr_en (minimum 125 ms after asserting sys_en) and powers up the sources associated with this signal (described in this section). ? after all sources are stable for the pxa27x processor, the da903x de-asserts (high) vcc_fault (so the pxa27x processor can continue with its power-up sequence). the sys_en signal controls these ldos: ? ldo18 ? ldo19 ? ldo17 ? plus ldo10/ldo11 if enabled these ldos are in charge of these pxa27x processor power domains: ? vcc_io
using dialog semiconductor* da903x advanced power management controllers with the intel? pxa27x processor family 10 application note ? vcc_lcd ? vcc_mem ? vcc_bb ? vcc_usim ? vcc_usb. when sys_en is asserted, the power-up sequence of the different ldos begins with ldo18 then all other ldos. the order in which these ldos are powered up does not matter with the exception of vcc_io. the vcc_io supply must be the highest potential in the system (excluding vcc_batt and vcc_usb) and must be sequenced on at the same time or before the other supplies enabled by sys_en. the pwr_en signal controls these sources: ? dc/dc converter with dvc, ldo15, ldo16. (plus ldo10/ldo11 if enabled) ? these sources are in charge of these pxa27x processor power domains: ? vcc_core ? vcc_pll ? vcc_sram ? when pwr_en is asserted, the power-up sequence of the different sources is as follows: ? dc/dc with dvc ? all other ldos at the same time or in interval timing. there is no importance in which order these ldos are powered up. once the resout1_n to the pxa27x processor or resout_n to the baseband processor is released, the baseband processor or the pxa27x processor must write a logic 1 to a dedicated i 2 c watchdog register bit during the next 8s period. this write moves the da903x into the active mode and starts the continuous watchdog monitoring circuit. failure to issue the initial watchdog write results in shutdown of the da903x to the power-down state. all other i/os of the da903x to the pxa27x processor are released after the rising of resout1_n. the i/o includes these i/o signals: ? pwr_en ? sys_en ? i 2 c ? usb otg signals ? irq. 3.3.4 pxa27x processor sleep mode the pxa27x processor sleep mode is triggered via pwr_en and sys_en. the pxa27x processor has two sleep stages. the first one is sleep mode where only the low voltage sources are shut down (pwr_en low). the other is deep sleep where all sources are shut down (high and low voltages, pwr_en and sys_en low).
using dialog semiconductor* da903x advanced power management controllers with the intel? pxa27x processor family application note 11 when pwr_en is lowered, all low-voltage sources to the pxa27x processor are shut down (dvm dc/dc, ldo15 and ldo16). there is no significant order to shut down; the only constraint is that they must be shut down within a maximum of 100msec. when sys_en is lowered, all high-voltage sources to the pxa27x processor must be shut down. (ldo17, 18 and 19). there is no constraint regarding the shut-down order with the exception of vcc_io. the vcc_io supply must be the highest potential in the system (excluding vcc_batt and vcc_usb). the only other constraint is that the sys_en shut-down sequence cannot occur before pwr_en shut down has completed (this is handled by the pxa27x processor). the opposite operations occur when exiting from sleep mode. when entering sleep mode, then exiting sleep mode is accomplished through the rising pxa27x processor pwr_en signal causing the da903x to power up all low-voltage sources to the pxa27x processor (dvm dc/dc, ldo15, and ldo 16). when exiting deep sleep, the pxa27x processor raises sys_en first causing the da903x to power up all high-voltage ldos to the pxa27x processor (ldo 17,18,19). the da903x first powers up ldo18 and then all others in no special order; the time constraint for all high-voltage ldos to be stable is 100msec. next, the pxa27x processor raises pwr_en (125 msec after raising sys_en), causing the low power sources to power up (dvm dc/dc, ldo15 and ldo16). note: the da903x power supplies can be enabled user the signals (pwr_en and sys_en) or by programming a register control through the i 2 c. by default, the power suplies within the da903x are enabled using the external signals driven by pwr_en and sys_en. when using the pxa27x application processor together with a communication processor, the communication processor can be used to control the power for the pxa27x application processor via i 2 c commands. 3.4 pmic control software interface the da903x pmic can be controlled and read through a serial interface using the control software included in the power management evaluation kit. the da903x pmic is controllable at several levels, including chip, module, register, and bit levels. using the control software allows the dialog semiconductor da903x pmic to power the pxa27x processor at the correct voltages and sequences required for a successful boot up. refer to the da903x power management evaluation kit for full functionality and capabilities of the control software. 3.5 dynamic voltage management (dvm) there are a number of features on the pxa27x processor that enable the dynamic management of power consumption. using these features, the core frequency voltage of the processor can be modified during operation, dynamically matching the computing performance to the current computing workload. the dialog semiconductor pmic combined with the pxa27x processor and dvm software can run a wide range of applications using only a fraction of the battery power that would be required running at the fixed frequency and voltage needed for the peak computing workload. supporting dvm in the dialog semiconductor da903x allows the following features to be fully used:
using dialog semiconductor* da903x advanced power management controllers with the intel? pxa27x processor family 12 application note ? the buck converter output voltage is programmable over the i 2 c bus in the range 0.85v to 1.625v in 25mv steps. additionally, the output voltage can be fixed at 1.8v for use with memory. ? the buck converter output voltage ramp rate is programmable over the i 2 c bus in the range of 1.6mv/us to 25mv/us with a 4 bit register. 3.6 system programming system programming covers the power-related issues from a software perspective. the proposed methods typically are part of the operating system or a basic input/output system. the pxa27x processor registers and the da903x pmic registers are being read and written at power up, when the system enters/exits sleep mode, or when the core voltage changes dynamically. using the i 2 c link, the pxa27x processor has full control to the da903x registers. 4.0 battery charger control the battery-charger control block controls the charging of the battery and allows a startup independent of the battery voltage. the charging block contains the following: ? an internal regulator, which is active when the battery voltage is too low to allow normal operation; this regulator is supplied from the vchg pin ? current regulation, which is needed for constant current charging ? voltage regulation, which is needed for constant voltage charging ? current monitoring, which is always active when the charger is on ? over voltage monitoring, which is always active when the charger is on ? temperature monitoring, which is needed to turn off charging when the battery temperature is too high or too low. the battery charger supports the following battery chemistries: ? single-cell li-ion at 4.1v ? single-cell li-ion at 4.2v ? li-polymer pack charging is separated into three different modes. one is the standalone pre-charge mode; the second is the fast-linear charge mode, which is controlled by the control processor. a third fast- pulse charge mode can also be used, where the charging current is limited by the ?wall-cube? power supply rather than the external fet. in this mode, the external fet acts solely as a switch, allowing high current charging of the battery. refer to the da903x documentation for more information on battery charging capabilities and functionality.
using dialog semiconductor* da903x advanced power management controllers with the intel? pxa27x processor family application note 13 5.0 conclusion this application note provides basic information for connecting the dialog semiconductor da903x advanced power management controller to the intel? pxa27x processor family. dialog semiconductor can design a variant pmic to address specific needs for other applications, if required. for more detailed information on the pmic circuits, contact dialog semiconductor directly (www.dialog-semiconductor.com).

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